1.1.1 Architecture of the CPU — OCR GCSE Computer Science revision notes

The purpose of the CPU

The CPU — Central Processing Unit — is the part of a computer that processes data and carries out instructions. Everything a computer does eventually comes down to the CPU executing instructions one after another.

It does that through the fetch-execute cycle, which repeats continuously for as long as the computer is switched on.

The components and registers together, with the two buses that connect the CPU to memory.

CPU: the Central Processing Unit: the part of a computer that processes data and carries out instructions, repeating the fetch-execute cycle for as long as the computer is switched on

Common CPU components

Figure: The four components and what each does

Component	What it manages, stores or controls
ALU (Arithmetic Logic Unit)	Carries out all calculations and logical comparisons — addition, subtraction, and tests such as greater than or equal to
CU (Control Unit)	Directs the operation of the whole CPU: it decodes instructions and sends signals telling the other parts what to do and when
Cache	Very fast memory inside the CPU holding frequently used instructions and data, so the CPU does not have to wait for slower RAM
Registers	Tiny, extremely fast storage locations inside the CPU that hold a single value each during the cycle

The Control Unit is the one students most often describe vaguely — it directs and coordinates, it does not calculate.

Von Neumann architecture and its registers

Von Neumann architecture is the design almost all modern computers use. Its defining feature is that instructions and data are stored together in the same memory and fetched over the same buses.

That matters because it is what makes a computer general purpose: change the program in memory and the machine does something completely different, without any physical change.

Figure: The four registers

Register	Holds	Data or address?
MAR — Memory Address Register	The address in memory currently being read from or written to	An address
MDR — Memory Data Register	The data or instruction just fetched from, or about to be written to, memory	Data
PC — Program Counter	The address of the next instruction to be fetched	An address
Accumulator	The result of the most recent calculation carried out by the ALU	Data

The specification asks for "the difference between storing data and an address" by name — two registers hold each.

An address is a location — a number saying where in memory something is. Data is the value itself. The MAR says which pigeonhole to look in; the MDR holds what was found there.

The Program Counter holds an address for the same reason: it does not hold the next instruction, only the location of it. That distinction is worth being careful about, because "the PC holds the next instruction" is a very common way to lose a mark.

Von Neumann architecture: the design used by almost all modern computers, in which instructions and data are stored together in the same memory and fetched over the same buses
Program Counter: the register that holds the address of the next instruction to be fetched
MAR: the Memory Address Register, which holds the address currently being read from or written to
MDR: the Memory Data Register, which holds the data or instruction fetched from that address
Accumulator: the register that stores the results of calculations carried out by the CPU

The fetch-execute cycle

Fetch expanded into its register actions, then decode and execute, then back to the start.

What happens at each stage:

Fetch 1. The Program Counter holds the address of the next instruction. 2. That address is copied into the MAR and sent to memory along the address bus. 3. The instruction at that address is sent back along the data bus into the MDR. 4. The Program Counter increments, so it now points at the following instruction.

Decode 5. The Control Unit works out what the instruction means and what needs to happen to carry it out.

Execute 6. The instruction is carried out. If it is a calculation, the ALU performs it and the result is stored in the Accumulator.

The cycle then repeats. The specification does not require knowledge of data being passed between registers within each stage, so the level of detail above is enough.

Worked example

Explain the role of the MAR and the MDR during the fetch stage.

Start with what each holds, since that is the distinction being tested.
The MAR holds an address — the location in memory of the instruction to be fetched.
That address is sent to memory along the address bus.
Memory returns the contents of that location along the data bus.
The MDR holds that returned value — the instruction itself, which is data rather than a location.

Answer: The MAR holds the address of the memory location being accessed, which is sent to memory on the address bus. The MDR holds the instruction or data returned from that location on the data bus. One stores where to look, the other stores what was found.

Common mistake

The Program Counter increments during fetch, not at the end of the cycle. That is why the CPU already knows where the next instruction is before the current one has finished executing.

Fetch-execute cycle: the continuous cycle in which the CPU fetches an instruction from memory, decodes it to work out what it means, and executes it

Before you practise

The CPU processes data and carries out instructions through the fetch-execute cycle.
ALU: calculations and logical comparisons. CU: directs and decodes. Cache: fast memory in the CPU. Registers: single fast storage locations.
Von Neumann architecture stores instructions and data together in the same memory.
MAR and PC hold addresses; MDR and Accumulator hold data.
The PC holds the address of the next instruction, not the instruction itself.
Fetch: PC → MAR → address bus → memory → data bus → MDR, and the PC increments.
Decode: the Control Unit works out the instruction. Execute: it is carried out, with results going to the Accumulator.
Passing of data between registers within each stage is not required.

The purpose of the CPU

Common CPU components

Von Neumann architecture and its registers

The fetch-execute cycle

Before you practise

Now practise it